mmMPCC0_MPCC_UPDATE_LOCK_SEL 5371 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC0_MPCC_UPDATE_LOCK_SEL                                                                   0x1635
mmMPCC0_MPCC_UPDATE_LOCK_SEL 6546 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC0_MPCC_UPDATE_LOCK_SEL                                                                   0x1276
mmMPCC0_MPCC_UPDATE_LOCK_SEL 5608 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC0_MPCC_UPDATE_LOCK_SEL                                                                   0x1276