mmMPCC0_MPCC_STATUS 5387 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC0_MPCC_STATUS                                                                            0x163d
mmMPCC0_MPCC_STATUS 6564 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC0_MPCC_STATUS                                                                            0x127f
mmMPCC0_MPCC_STATUS 5626 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC0_MPCC_STATUS                                                                            0x127f