mmMPCC0_MPCC_OPP_ID_BASE_IDX 5366 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC0_MPCC_OPP_ID_BASE_IDX                                                                   2
mmMPCC0_MPCC_OPP_ID_BASE_IDX 6541 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC0_MPCC_OPP_ID_BASE_IDX                                                                   2
mmMPCC0_MPCC_OPP_ID_BASE_IDX 5603 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC0_MPCC_OPP_ID_BASE_IDX                                                                   2