mmMPCC0_MPCC_MEM_PWR_CTRL 6560 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC0_MPCC_MEM_PWR_CTRL                                                                      0x127d
mmMPCC0_MPCC_MEM_PWR_CTRL 5622 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC0_MPCC_MEM_PWR_CTRL                                                                      0x127d