mmMPCC0_MPCC_BG_R_CR 5379 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC0_MPCC_BG_R_CR                                                                           0x1639
mmMPCC0_MPCC_BG_R_CR 6554 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC0_MPCC_BG_R_CR                                                                           0x127a
mmMPCC0_MPCC_BG_R_CR 5616 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC0_MPCC_BG_R_CR                                                                           0x127a