mmMPCC0_MPCC_BG_G_Y 5381 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC0_MPCC_BG_G_Y                                                                            0x163a
mmMPCC0_MPCC_BG_G_Y 6556 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC0_MPCC_BG_G_Y                                                                            0x127b
mmMPCC0_MPCC_BG_G_Y 5618 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC0_MPCC_BG_G_Y                                                                            0x127b