mmMP1_SMN_PUB_CTRL_BASE_IDX  339 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_PUB_CTRL_BASE_IDX                                                                    0
mmMP1_SMN_PUB_CTRL_BASE_IDX  371 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_PUB_CTRL_BASE_IDX	0