mmMP1_SMN_C2PMSG_85  288 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_85                                                                            0x0295
mmMP1_SMN_C2PMSG_85  290 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_85                                                                            0x0295
mmMP1_SMN_C2PMSG_85  288 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_85                                                                            0x0295
mmMP1_SMN_C2PMSG_85  300 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_85	0x0295