mmMP1_SMN_C2PMSG_65  248 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_65                                                                            0x0281
mmMP1_SMN_C2PMSG_65  250 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_65                                                                            0x0281
mmMP1_SMN_C2PMSG_65  248 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_65                                                                            0x0281
mmMP1_SMN_C2PMSG_65  260 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_65	0x0281