mmMP1_SMN_C2PMSG_50  218 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_50                                                                            0x0272
mmMP1_SMN_C2PMSG_50  220 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_50                                                                            0x0272
mmMP1_SMN_C2PMSG_50  218 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_50                                                                            0x0272
mmMP1_SMN_C2PMSG_50  230 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_50	0x0272