mmMP1_SMN_C2PMSG_47  212 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_47                                                                            0x026f
mmMP1_SMN_C2PMSG_47  214 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_47                                                                            0x026f
mmMP1_SMN_C2PMSG_47  212 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_47                                                                            0x026f
mmMP1_SMN_C2PMSG_47  224 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_47	0x026f