mmMP1_SMN_C2PMSG_45  208 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_45                                                                            0x026d
mmMP1_SMN_C2PMSG_45  210 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_45                                                                            0x026d
mmMP1_SMN_C2PMSG_45  208 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_45                                                                            0x026d
mmMP1_SMN_C2PMSG_45  220 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_45	0x026d