mmMP1_SMN_C2PMSG_40  198 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_40                                                                            0x0268
mmMP1_SMN_C2PMSG_40  200 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_40                                                                            0x0268
mmMP1_SMN_C2PMSG_40  198 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_40                                                                            0x0268
mmMP1_SMN_C2PMSG_40  210 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_40	0x0268