mmMP1_SMN_C2PMSG_37  192 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_37                                                                            0x0265
mmMP1_SMN_C2PMSG_37  194 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_37                                                                            0x0265
mmMP1_SMN_C2PMSG_37  192 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_37                                                                            0x0265
mmMP1_SMN_C2PMSG_37  204 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_37	0x0265