mmMP1_SMN_C2PMSG_35  188 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_35                                                                            0x0263
mmMP1_SMN_C2PMSG_35  190 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_35                                                                            0x0263
mmMP1_SMN_C2PMSG_35  188 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_35                                                                            0x0263
mmMP1_SMN_C2PMSG_35  200 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_35	0x0263