mmMP1_SMN_C2PMSG_102  322 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_102                                                                           0x02a6
mmMP1_SMN_C2PMSG_102  324 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_102                                                                           0x02a6
mmMP1_SMN_C2PMSG_102  322 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_102                                                                           0x02a6
mmMP1_SMN_C2PMSG_102  334 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_102	0x02a6