mmMP1_SMN_C2PMSG_101  320 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP1_SMN_C2PMSG_101                                                                           0x02a5
mmMP1_SMN_C2PMSG_101  322 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP1_SMN_C2PMSG_101                                                                           0x02a5
mmMP1_SMN_C2PMSG_101  320 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP1_SMN_C2PMSG_101                                                                           0x02a5
mmMP1_SMN_C2PMSG_101  332 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP1_SMN_C2PMSG_101	0x02a5