mmMP0_SMN_C2PMSG_40   44 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP0_SMN_C2PMSG_40                                                                            0x0068
mmMP0_SMN_C2PMSG_40   44 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP0_SMN_C2PMSG_40                                                                            0x0068
mmMP0_SMN_C2PMSG_40   44 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP0_SMN_C2PMSG_40                                                                            0x0068
mmMP0_SMN_C2PMSG_40   44 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP0_SMN_C2PMSG_40	0x0068