mmMP0_SMN_C2PMSG_101  166 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h #define mmMP0_SMN_C2PMSG_101                                                                           0x00a5
mmMP0_SMN_C2PMSG_101  166 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h #define mmMP0_SMN_C2PMSG_101                                                                           0x00a5
mmMP0_SMN_C2PMSG_101  166 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h #define mmMP0_SMN_C2PMSG_101                                                                           0x00a5
mmMP0_SMN_C2PMSG_101  166 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h #define mmMP0_SMN_C2PMSG_101	0x00a5