mmMM_CFGREGS_CNTL  636 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_d.h #define mmMM_CFGREGS_CNTL 0x1513
mmMM_CFGREGS_CNTL   39 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_d.h #define mmMM_CFGREGS_CNTL                                                       0x1513
mmMM_CFGREGS_CNTL   47 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h #define mmMM_CFGREGS_CNTL                                                       0x1513
mmMM_CFGREGS_CNTL   40 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h #define mmMM_CFGREGS_CNTL                                                       0x1513
mmMM_CFGREGS_CNTL  807 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmMM_CFGREGS_CNTL                                                                              0x0e0e // duplicate 
mmMM_CFGREGS_CNTL  450 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h #define mmMM_CFGREGS_CNTL                                                                              0x00ee
mmMM_CFGREGS_CNTL 2456 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h #define mmMM_CFGREGS_CNTL                                                                              0x00ee
mmMM_CFGREGS_CNTL 4338 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmMM_CFGREGS_CNTL                                                                              0x00ee
mmMM_CFGREGS_CNTL 2778 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmMM_CFGREGS_CNTL                                                                              0x00ee