mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX 1587 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX                                                             2
mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX 1227 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX                                                             2
mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX 1189 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMMHUBBUB_MEM_PWR_STATUS_BASE_IDX                                                             2