mmMC_VM_MARC_BASE_LO_3 6602 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_MARC_BASE_LO_3                                                                         0x5a94
mmMC_VM_MARC_BASE_LO_3 6848 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_MARC_BASE_LO_3                                                                         0x5a94
mmMC_VM_MARC_BASE_LO_3 6872 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_MARC_BASE_LO_3                                                                         0x5a94
mmMC_VM_MARC_BASE_LO_3  685 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_VM_MARC_BASE_LO_3                                                  0xf9aa
mmMC_VM_MARC_BASE_LO_3  686 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h #define mmMC_VM_MARC_BASE_LO_3                                                  0xf9aa
mmMC_VM_MARC_BASE_LO_3 1804 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_MARC_BASE_LO_3                                                                         0x07e0
mmMC_VM_MARC_BASE_LO_3 1836 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_MARC_BASE_LO_3                                                                         0x07e0
mmMC_VM_MARC_BASE_LO_3 1820 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_MARC_BASE_LO_3                                                                         0x07e0