mmMC_VM_MARC_BASE_LO_2 6600 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_MARC_BASE_LO_2                                                                         0x5a93
mmMC_VM_MARC_BASE_LO_2 6846 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_MARC_BASE_LO_2                                                                         0x5a93
mmMC_VM_MARC_BASE_LO_2 6870 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_MARC_BASE_LO_2                                                                         0x5a93
mmMC_VM_MARC_BASE_LO_2  684 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_VM_MARC_BASE_LO_2                                                  0xf9a4
mmMC_VM_MARC_BASE_LO_2  685 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h #define mmMC_VM_MARC_BASE_LO_2                                                  0xf9a4
mmMC_VM_MARC_BASE_LO_2 1802 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_MARC_BASE_LO_2                                                                         0x07df
mmMC_VM_MARC_BASE_LO_2 1834 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_MARC_BASE_LO_2                                                                         0x07df
mmMC_VM_MARC_BASE_LO_2 1818 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_MARC_BASE_LO_2                                                                         0x07df