mmMC_VM_MARC_BASE_LO_1 6598 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_MARC_BASE_LO_1                                                                         0x5a92
mmMC_VM_MARC_BASE_LO_1 6844 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_MARC_BASE_LO_1                                                                         0x5a92
mmMC_VM_MARC_BASE_LO_1 6868 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_MARC_BASE_LO_1                                                                         0x5a92
mmMC_VM_MARC_BASE_LO_1  683 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_VM_MARC_BASE_LO_1                                                  0xf99e
mmMC_VM_MARC_BASE_LO_1  684 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h #define mmMC_VM_MARC_BASE_LO_1                                                  0xf99e
mmMC_VM_MARC_BASE_LO_1 1800 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_MARC_BASE_LO_1                                                                         0x07de
mmMC_VM_MARC_BASE_LO_1 1832 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_MARC_BASE_LO_1                                                                         0x07de
mmMC_VM_MARC_BASE_LO_1 1816 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_MARC_BASE_LO_1                                                                         0x07de