mmMC_VM_MARC_BASE_HI_2 6608 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_MARC_BASE_HI_2                                                                         0x5a97
mmMC_VM_MARC_BASE_HI_2 6854 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_MARC_BASE_HI_2                                                                         0x5a97
mmMC_VM_MARC_BASE_HI_2 6878 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_MARC_BASE_HI_2                                                                         0x5a97
mmMC_VM_MARC_BASE_HI_2  688 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_VM_MARC_BASE_HI_2                                                  0xf9a5
mmMC_VM_MARC_BASE_HI_2  689 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h #define mmMC_VM_MARC_BASE_HI_2                                                  0xf9a5
mmMC_VM_MARC_BASE_HI_2 1810 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_MARC_BASE_HI_2                                                                         0x07e3
mmMC_VM_MARC_BASE_HI_2 1842 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_MARC_BASE_HI_2                                                                         0x07e3
mmMC_VM_MARC_BASE_HI_2 1826 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_MARC_BASE_HI_2                                                                         0x07e3