mmMC_VM_MARC_BASE_HI_1 6606 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_MARC_BASE_HI_1                                                                         0x5a96
mmMC_VM_MARC_BASE_HI_1 6852 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_MARC_BASE_HI_1                                                                         0x5a96
mmMC_VM_MARC_BASE_HI_1 6876 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_MARC_BASE_HI_1                                                                         0x5a96
mmMC_VM_MARC_BASE_HI_1  687 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_VM_MARC_BASE_HI_1                                                  0xf99f
mmMC_VM_MARC_BASE_HI_1  688 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h #define mmMC_VM_MARC_BASE_HI_1                                                  0xf99f
mmMC_VM_MARC_BASE_HI_1 1808 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_MARC_BASE_HI_1                                                                         0x07e2
mmMC_VM_MARC_BASE_HI_1 1840 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_MARC_BASE_HI_1                                                                         0x07e2
mmMC_VM_MARC_BASE_HI_1 1824 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_MARC_BASE_HI_1                                                                         0x07e2