mmMC_VM_MARC_BASE_HI_0 6604 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_MARC_BASE_HI_0                                                                         0x5a95
mmMC_VM_MARC_BASE_HI_0 6850 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_MARC_BASE_HI_0                                                                         0x5a95
mmMC_VM_MARC_BASE_HI_0 6874 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_MARC_BASE_HI_0                                                                         0x5a95
mmMC_VM_MARC_BASE_HI_0  686 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_VM_MARC_BASE_HI_0                                                  0xf999
mmMC_VM_MARC_BASE_HI_0  687 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h #define mmMC_VM_MARC_BASE_HI_0                                                  0xf999
mmMC_VM_MARC_BASE_HI_0 1806 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_MARC_BASE_HI_0                                                                         0x07e1
mmMC_VM_MARC_BASE_HI_0 1838 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_MARC_BASE_HI_0                                                                         0x07e1
mmMC_VM_MARC_BASE_HI_0 1822 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_MARC_BASE_HI_0                                                                         0x07e1