mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 5931 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                      1
mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 6175 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                      1
mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 6139 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                      1
mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 1751 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                      0
mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 1783 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                      0
mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 1767 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX                                                      0