mmMC_VM_APT_CNTL_BASE_IDX 1654 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmMC_VM_APT_CNTL_BASE_IDX                                                                      0
mmMC_VM_APT_CNTL_BASE_IDX 1687 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmMC_VM_APT_CNTL_BASE_IDX                                                                      0
mmMC_VM_APT_CNTL_BASE_IDX 1625 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmMC_VM_APT_CNTL_BASE_IDX                                                                      0
mmMC_VM_APT_CNTL_BASE_IDX 1921 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmMC_VM_APT_CNTL_BASE_IDX                                                                      0
mmMC_VM_APT_CNTL_BASE_IDX 1953 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmMC_VM_APT_CNTL_BASE_IDX                                                                      0
mmMC_VM_APT_CNTL_BASE_IDX 1941 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmMC_VM_APT_CNTL_BASE_IDX                                                                      0