mmMC_SEQ_TRAIN_EDC_THRESHOLD3  965 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h #define mmMC_SEQ_TRAIN_EDC_THRESHOLD3 0x0AFF
mmMC_SEQ_TRAIN_EDC_THRESHOLD3  662 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h #define mmMC_SEQ_TRAIN_EDC_THRESHOLD3                                           0xaff
mmMC_SEQ_TRAIN_EDC_THRESHOLD3  766 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h #define mmMC_SEQ_TRAIN_EDC_THRESHOLD3                                           0xaff