mmMAILBOX_MSGBUF_TRN_DW1_BASE_IDX 1136 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmMAILBOX_MSGBUF_TRN_DW1_BASE_IDX                                                              0
mmMAILBOX_MSGBUF_TRN_DW1_BASE_IDX 4487 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmMAILBOX_MSGBUF_TRN_DW1_BASE_IDX                                                              2
mmMAILBOX_MSGBUF_TRN_DW1_BASE_IDX 2917 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmMAILBOX_MSGBUF_TRN_DW1_BASE_IDX                                                              2