mmMAILBOX_MSGBUF_RCV_DW0_BASE_IDX 1142 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmMAILBOX_MSGBUF_RCV_DW0_BASE_IDX                                                              0
mmMAILBOX_MSGBUF_RCV_DW0_BASE_IDX 4493 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmMAILBOX_MSGBUF_RCV_DW0_BASE_IDX                                                              2
mmMAILBOX_MSGBUF_RCV_DW0_BASE_IDX 2923 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmMAILBOX_MSGBUF_RCV_DW0_BASE_IDX                                                              2