mmMAILBOX_INT_CNTL_BASE_IDX 1152 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmMAILBOX_INT_CNTL_BASE_IDX                                                                    0
mmMAILBOX_INT_CNTL_BASE_IDX 4503 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmMAILBOX_INT_CNTL_BASE_IDX                                                                    2
mmMAILBOX_INT_CNTL_BASE_IDX 2933 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmMAILBOX_INT_CNTL_BASE_IDX                                                                    2