mmMAILBOX_INT_CNTL 186 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h #define mmMAILBOX_INT_CNTL 0x14d1 mmMAILBOX_INT_CNTL 1151 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h #define mmMAILBOX_INT_CNTL 0x0e5f // duplicate mmMAILBOX_INT_CNTL 4502 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h #define mmMAILBOX_INT_CNTL 0x013f mmMAILBOX_INT_CNTL 2932 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h #define mmMAILBOX_INT_CNTL 0x013f