mmJPEG_CGC_GATE_BASE_IDX  139 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmJPEG_CGC_GATE_BASE_IDX                                                                       1
mmJPEG_CGC_GATE_BASE_IDX  299 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmJPEG_CGC_GATE_BASE_IDX                                                                       1
mmJPEG_CGC_GATE_BASE_IDX  349 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmJPEG_CGC_GATE_BASE_IDX                                                                       0
mmJPEG_CGC_GATE_BASE_IDX  352 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmJPEG_CGC_GATE_BASE_IDX                                                                       0