mmIH_LIMIT_INT_RATE_CNTL_BASE_IDX  187 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_offset.h #define mmIH_LIMIT_INT_RATE_CNTL_BASE_IDX                                                              0
mmIH_LIMIT_INT_RATE_CNTL_BASE_IDX  187 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_offset.h #define mmIH_LIMIT_INT_RATE_CNTL_BASE_IDX                                                              0
mmIH_LIMIT_INT_RATE_CNTL_BASE_IDX  187 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_offset.h #define mmIH_LIMIT_INT_RATE_CNTL_BASE_IDX                                                              0