mmIA_UTCL1_STATUS_BASE_IDX 2315 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmIA_UTCL1_STATUS_BASE_IDX                                                                     0
mmIA_UTCL1_STATUS_BASE_IDX  305 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmIA_UTCL1_STATUS_BASE_IDX                                                                     0
mmIA_UTCL1_STATUS_BASE_IDX  301 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmIA_UTCL1_STATUS_BASE_IDX                                                                     0
mmIA_UTCL1_STATUS_BASE_IDX  295 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmIA_UTCL1_STATUS_BASE_IDX                                                                     0