mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX 3299 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX 3337 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2
mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX 3133 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmHUBPREQ3_DCN_CUR0_TTU_CNTL1_BASE_IDX                                                         2