mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX 3009 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX 2989 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2
mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX 2837 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmHUBPREQ2_DCN_SURF1_TTU_CNTL1_BASE_IDX                                                        2