mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX 3007 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX 2987 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX 2835 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmHUBPREQ2_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2