mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX 2435 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX 2299 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2
mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX 2251 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmHUBPREQ0_DCN_SURF1_TTU_CNTL0_BASE_IDX                                                        2