mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX 9699 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX                                                             2
mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX 7812 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX                                                             2
mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX 10407 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX                                                             2
mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX 9369 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmHPD0_DC_HPD_INT_CONTROL_BASE_IDX                                                             2