mmGRBM_PWR_CNTL2 2090 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmGRBM_PWR_CNTL2                                                                               0x0dc5
mmGRBM_PWR_CNTL2   84 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmGRBM_PWR_CNTL2                                                                               0x0025
mmGRBM_PWR_CNTL2   84 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGRBM_PWR_CNTL2                                                                               0x0025
mmGRBM_PWR_CNTL2   82 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGRBM_PWR_CNTL2                                                                               0x0025