mmGENFC_WT_1_BASE_IDX  637 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmGENFC_WT_1_BASE_IDX                                                                          1
mmGENFC_WT_1_BASE_IDX  129 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmGENFC_WT_1_BASE_IDX                                                                          1
mmGENFC_WT_1_BASE_IDX  115 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmGENFC_WT_1_BASE_IDX                                                                          1
mmGENFC_WT_1_BASE_IDX   81 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmGENFC_WT_1_BASE_IDX                                                                          1