mmGDS_PS0_CTXSW_CNT3_BASE_IDX 3187 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmGDS_PS0_CTXSW_CNT3_BASE_IDX                                                                  0
mmGDS_PS0_CTXSW_CNT3_BASE_IDX 3439 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGDS_PS0_CTXSW_CNT3_BASE_IDX                                                                  0
mmGDS_PS0_CTXSW_CNT3_BASE_IDX 3389 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGDS_PS0_CTXSW_CNT3_BASE_IDX                                                                  0