BIF_CFG_DEV0_EPF0_VF4_1_COMMAND__SERR_EN_MASK 101561 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF4_1_COMMAND__SERR_EN_MASK                                                         0x0100L
BIF_CFG_DEV0_EPF0_VF4_1_COMMAND__SERR_EN_MASK 29356 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF4_1_COMMAND__SERR_EN_MASK                                                         0x0100L