mmGDS_DSM_CNTL_BASE_IDX 2773 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmGDS_DSM_CNTL_BASE_IDX                                                                        0
mmGDS_DSM_CNTL_BASE_IDX  873 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmGDS_DSM_CNTL_BASE_IDX                                                                        0
mmGDS_DSM_CNTL_BASE_IDX  843 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGDS_DSM_CNTL_BASE_IDX                                                                        0
mmGDS_DSM_CNTL_BASE_IDX  813 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGDS_DSM_CNTL_BASE_IDX                                                                        0