mmGC_USER_RB_BACKEND_DISABLE 2980 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmGC_USER_RB_BACKEND_DISABLE                                                                   0x147f
mmGC_USER_RB_BACKEND_DISABLE 1054 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmGC_USER_RB_BACKEND_DISABLE                                                                   0x06df
mmGC_USER_RB_BACKEND_DISABLE 1024 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGC_USER_RB_BACKEND_DISABLE                                                                   0x06df
mmGC_USER_RB_BACKEND_DISABLE  990 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGC_USER_RB_BACKEND_DISABLE                                                                   0x06df
mmGC_USER_RB_BACKEND_DISABLE  691 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmGC_USER_RB_BACKEND_DISABLE 0x26DF
mmGC_USER_RB_BACKEND_DISABLE  687 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmGC_USER_RB_BACKEND_DISABLE                                            0x26df
mmGC_USER_RB_BACKEND_DISABLE  700 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmGC_USER_RB_BACKEND_DISABLE                                            0x26df
mmGC_USER_RB_BACKEND_DISABLE  772 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmGC_USER_RB_BACKEND_DISABLE                                            0x26df
mmGC_USER_RB_BACKEND_DISABLE  772 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmGC_USER_RB_BACKEND_DISABLE                                            0x26df