mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX 3961 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX                                                              0
mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX 1927 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX                                                              0
mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX 1871 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX                                                              0