mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX 3779 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX                                                            0
mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX 1755 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX                                                            0
mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX 1697 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX                                                            0